4.6 Article

Fast and Reconfigurable Logic Synthesis in Memristor Crossbar Array

期刊

ADVANCED INTELLIGENT SYSTEMS
卷 4, 期 12, 页码 -

出版社

WILEY
DOI: 10.1002/aisy.202200207

关键词

in-memory computing; memristors; resistance coupling

资金

  1. Major Program of the Ministry of Science and Technology of China [2018AAA0103300]
  2. National Natural Science Foundation of China [61974164, 62074166, 61804181, 62004219, 62004220, 62104256]
  3. Strategic Priority Research Program of the Chinese Academy of Sciences [XDB44000000]
  4. Major Scientific Research Project of Zhejiang Lab [2019KC0AD02]
  5. Beijing Academy of Artificial Intelligence (BAAI)

向作者/读者索取更多资源

A novel Cu/alpha-Si/alpha-C/Pt memristor and direct resistance-coupling logic synthesis scheme for high-efficiency in-memory computing is presented in this study. The memristor exhibits excellent uniformity, fast switching speed, good endurance, and long retention. Complete set of Boolean logic and some derived logic operators are efficiently implemented in the Cu/alpha-Si/alpha-C/Pt crossbar array, demonstrating reconfigurable and parallel logic synthesis.
Memristor is a potential basic unit for the in-memory computing system, which is an approach to break the memory wall of the traditional computer. However, low switching speed, nonuniform device characteristics, and inefficient logic synthesis hinder the development of memristor-based in-memory computing. Herein, a novel Cu/alpha-Si/alpha-C/Pt memristor and direct resistance-coupling logic synthesis scheme to construct high-efficiency in-memory computing is presented. The memristor shows excellent uniformity of low/high resistance (relative dispersion sigma/mu = 4.68% and 3.28%) and SET/RESET voltage (relative dispersion sigma/mu = 3.24% and 5.85%), fast switching speed (approximate to 30 ns), good endurance (>10(8)), and long retention (>10(5) s at 100 degrees C). Complete set of Boolean logic and some derived logic operators are efficiently implemented in the Cu/alpha-Si/alpha-C/Pt crossbar array. Furthermore, the reconfigurable and parallel logic synthesis is experimentally demonstrated by one-bit full adder and parallel copy operation. This work can greatly improve the logic computing efficiency and flexibility in the memristor crossbar array.

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