期刊
2022 55TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE (MICRO)
卷 -, 期 -, 页码 1110-1125出版社
IEEE COMPUTER SOC
DOI: 10.1109/MICRO56248.2022.00079
关键词
quantum computing; quantum error correction; fault-tolerant quantum computing
资金
- JST PRESTO [JPMJPR1916, JPMJPR2015]
- JST Moonshot RD Grant [JPMJMS2061, JPMJMS2067]
- JST ERATO Grant [JPMJER1601]
- MEXT Q-LEAP Grant [JPMXS0118068682]
- JSPS KAKENHI [JP22H05000, JP22K17868]
This paper proposes an FTQC architecture called Q3DE, which enhances the tolerance to multi-bit burst errors (MBBEs) caused by cosmic rays. Through dynamic adjustments of the encoding level and re-estimating recovery operations, Q3DE effectively reduces the impact of MBBEs and decreases their period and size. This scheme is versatile for various physical devices and FTQC architectures.
Demonstrating small error rates by integrating quantum error correction (QEC) into an architecture of quantum computing is the next milestone towards scalable fault-tolerant quantum computing (FTQC). Encoding logical qubits with superconducting qubits and surface codes is considered a promising candidate for FTQC architectures. In this paper, we propose an FTQC architecture, which we call Q3DE, that enhances the tolerance to multi-bit burst errors (MBBEs) by cosmic rays with moderate changes and overhead. There are three core components in Q3DE: in-situ anomaly DEtection, dynamic code DEformation, and optimized error DEcoding. In this architecture, MBBEs are detected only from syndrome values for error correction. The effect of MBBEs is immediately mitigated by dynamically increasing the encoding level of logical qubits and re-estimating probable recovery operation with the rollback of the decoding process. We investigate the performance and overhead of the Q3DE architecture with quantum-error simulators and demonstrate that Q3DE effectively reduces the period of MBBEs by 1000 times and halves the size of their region. Therefore, Q3DE significantly relaxes the requirement of qubit density and qubit chip size to realize FTQC. Our scheme is versatile for mitigating MBBEs, i.e., temporal variations of error properties, on a wide range of physical devices and FTQC architectures since it relies only on the standard features of topological stabilizer codes.
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