A 48 mW DROIC with 15-bit pixel-level ADC for 640x512 mid-wave infrared imagers

A low-power digital readout integrated circuit(DROIC)with 15-bit pixel-level single-slope analog-to-digital converter(ADC)for mid-wave infrared imagers is proposed. A novel pulse comparator featured power-self-adaption is presented for the pixel-level ADC to reduce power consumption. Only when the ramp signal ap-proaches the integration voltage,there is current flowing through the comparator. Furthermore,the pulse output of the comparator also reduces dynamic power consumed by the 15-bit pixel conversion result memories. For achieving the requirement of 15 mu m pixel pitch,the memories adopt a 3-transistor dynamic structure and only oc-cupy about 54 mu m2. The current mode transmission is used to read out the analog-to-digital conversion results to column for robustness against voltage crosstalk between adjacent column bus lines. The 640x512 DROIC with this structure is fabricated in 0. 18 mu m CMOS process. The experimental results demonstrate the DROIC con-sumes 48 mW at 120 fps. The total integration capacitor is about 740 fF and the charge handling capacity is 8.8 Me-. The equivalent noise voltage on the integration capacitor is 116 mu V and the peak signal-to-noise ratio is 84 dB at the full well.

Automated summary

This paper proposes a low-power digital readout integrated circuit (DROIC) for mid-wave infrared imagers. The circuit features a 15-bit pixel-level single-slope analog-to-digital converter (ADC) and a novel power-self-adaptation pulse comparator to reduce power consumption. Experimental results demonstrate the circuit's good performance and low power consumption.