A 130-nm BiCMOS, 2-nV/√Hz Input-Referred Noise Interface Circuit for Multiple Resistive Sensors

This letter presents a fully analog interface circuit for resistive sensor arrays, fabricated in a 130-nm BiCMOS technology, which, exploiting the same devices for closed-loop sensor biasing and signal read-out, achieves 2-nV/ $\sqrt {\text {Hz}}$ total input-referred noise. The interface circuit can bias the sensors both with a constant voltage (voltage mode) or a constant current (current mode), with an active area of 1 mm 2, achieves 20-MHz bandwidth and less than 2- $\mu \text{s}$ biasing rise time, consuming 100.3 mW.

Automated summary

This letter presents an analog interface circuit for resistive sensor arrays, which achieves low noise and high performance signal readout.