3.8 Proceedings Paper

An Integrated Circuit for Galvanostatic Electrodeposition of on-chip Electrochemical Sensors

出版社

IEEE
DOI: 10.1109/ICECS202256217.2022.9970881

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current reference; subthreshold region; sensor fabrication; potentiostat; biosensor array; complementary metal-oxide semiconductor (CMOS); electrochemical sensor

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This paper presents the design of an integrated circuit for galvanostatic deposition and amperometric readout of electrochemical sensors. The circuit is designed to generate stable currents with low sensitivity to process, power supply voltage, and temperature. The feasibility of on-chip electrodeposition was demonstrated by successfully depositing a gold layer on top of electrodes.
This paper presents the design of an integrated circuit (IC) for (i) galvanostatic deposition of sensor layers on the on-chip pads, which serve as the sensor's base layer, and (ii) amperometric readout of electrochemical sensors. The system consists of three main circuit blocks: the electrochemical cell including a 4x4 electrode array, two Beta-multiplier based current generators and one pA-size current generator for galvanostatic electrodeposition, and a switch-capacitor based amperometric readout circuit for sensor current measurement. The circuits are designed and simulated in a 180-nm CMOS process. The three current reference circuits generate a stable current from 7.2 pA to 88 mu A with low process, power supply voltage and temperature (PVT) sensitivity. The pA-size current generator has a temperature coefficient of 517.8 ppm/degrees C on average (across corners) in the range of 0 to 60 degrees C. The line regulation is 4.4 %/V over a supply voltage range of 0.8-3 V. The feasibility of galvanostatic deposition on on-chip pads is validated by applying a fixed current of 300 nA to electrochemically deposit a gold layer on top of electrodes with nickel/zinc as the adhesive layer for gold. Successful deposition of gold was confirmed using optical microscope images of the on-chip electrodes.

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