Low temperature source/drain epitaxy and functional silicides: essentials for ultimate contact scaling

Low temperature Si1-xGex source-drain epitaxy processes are associated with exploratory contact metals to identify stacks alleviating access resistance issues in modern logic devices. TiN / W metal-to-metal interfaces featuring contact resistivities < 5x10(-10) Omega center dot cm(2) demonstrate the resolution of the test vehicle and extraction methods. Amongst the different systems investigated, Sc / Si:P yields similar to 1.3x10(-9) Omega center dot cm(2), which represents a similar to 35% reduction with respect to the Ti / Si:P reference. This confirms that doping levels in Si:P are sufficient to achieve significant performance gains. Analyses of Sc / Si:P stacks reveal the material properties and reaction mechanisms responsible for the contact resistivity reduction.

Automated summary

Low temperature Si1-xGex source-drain epitaxy processes can alleviate access resistance issues in modern logic devices by utilizing specific stack structures. Among the different systems investigated, TiN / W metal-to-metal interfaces demonstrate low contact resistivity, while Sc / Si:P stacks exhibit improved performance. Analysis of the Sc / Si:P stacks reveals the material properties and reaction mechanisms responsible for the reduction in contact resistivity.