3.8 Proceedings Paper

Forksheet FETs with Bottom Dielectric Isolation, Self-Aligned Gate Cut, and Isolation between Adjacent Source-Drain Structures

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IEEE
DOI: 10.1109/IEDM45625.2022.10019497

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We present a method to fabricate forksheet field-effect transistors with bottom dielectric isolation, where the devices are anchored to the substrate by forksheet walls. We demonstrate functional unipolar forksheet devices with bottom dielectric isolation for both N- and PMOS, with wall widths as thin as 10 nm. Additionally, we describe a scheme to isolate adjacent source-drain structures using forksheet dielectric walls. This scheme compensates for wall losses by increasing wall height through active area patterning hard mask engineering. Finally, we demonstrate morphological self-alignment of gate cut to active.
We report on forksheet field-effect transistors that are isolated from the substrate by bottom dielectric isolation (BDI) formed by replacing a SiGe epitaxial layer with a dielectric film while the devices are anchored to the substrate by forksheet walls. Functional unipolar forksheet devices with BDI are demonstrated for both N- and PMOS, for wall widths down to 10 nm. In addition, we describe a scheme to isolate adjacent source-drain structures by the forksheet dielectric wall. This scheme relies on increasing wall height, by means of active area patterning hard mask engineering, to compensate for wall losses in downstream process modules. Finally, self-alignment of gate cut to active is demonstrated morphologically.

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