期刊
INTEGRATION-THE VLSI JOURNAL
卷 94, 期 -, 页码 -出版社
ELSEVIER
DOI: 10.1016/j.vlsi.2023.102085
关键词
Frequency compensation; High current efficiency; Low-power; Two-stage amplifier
This paper proposes a high current efficiency two-stage amplifier using the MNFC method, which improves the phase margin and extends the gain bandwidth by adding a nested small-gain stage between the two stages and eliminating the non-dominant pole using MNFC technique. The experimental results show that the amplifier has good performance.
In this paper, a high current efficiency two-stage amplifier using multipath nested feedforward compensation (MNFC) method is proposed. For the purpose of achieving the high current efficiency, the first stage of the amplifier uses a recycling folded cascode amplifier (RFC) and a nested small-gain stage is added between the two stages of the amplifier so that there are two paths in the feedforward path. This two-stage amplifier improves the phase margin (PM) and extends the gain bandwidth (GBW) by using the MNFC technique which can eliminate the non-dominant pole. The chip area of this two-stage MNFC amplifier which using 0.18 mu m CMOS process is 0.01272 mm2. The simulated and measured results shows that the phase margin(PM), DC gain, gain-bandwidth(GBW), average 1% settling time, slew rate-(SR-) and slew rate+ (SR+) is 72.7 degrees, 104.4 dB, 4.29 MHz, 246.2 ns, 16 V/mu s, and 6.15 V/mu s, respectively, when the load capacitance is 120 pF. The supply voltage of this circuit is 1.8 V and the power consumption is 0.13 mW.
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