4.6 Article

Front-End Programmable 40 GS/s Monobit ADC in 45 nm SOI Technology

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IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TMTT.2023.3315799

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Analog to digital converter (ADC); blocker detection; current-mode logic; monobit sampler

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This paper presents a 40 GS/s monobit analog-to-digital converter (ADC) that is capable of detecting RF signals in a 2-20 GHz bandwidth. The converter offers high sensitivity and dynamic range, and is power efficient.
A 40 GS/s monobit analog-to-digital converter (ADC) with programmable RF input conditioning implemented in an RF 45 nm silicon-on-insulator (GF 45RFSOI) technology is presented as a solution toward wide-band blocker sensing for adaptive radio. The direct sampling ADC is able to detect RF signals in a 2-20 GHz bandwidth with at least $-$ 71 dB sensitivity and 38.6 dB dynamic range utilizing a programmable attenuation range of 46.5 dB. The monobit ADC core is power efficient with only 112.1 mW of power consumption, with the RF front-end consuming another 60.8 mW of power. The core circuitry has an area of 0.568 mm $<^>{2}$ fabricated in the 45RFSOI process and tested using a co-designed evaluation board.

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