4.8 Article

High-Density Artificial Synapse Array Consisting of Homogeneous Electrolyte-Gated Transistors

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ADVANCED SCIENCE
卷 -, 期 -, 页码 -

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WILEY
DOI: 10.1002/advs.202305430

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artificial synapse array; electrolyte-gated transistors; lateral-gate; Photo-Lithography; metal-organic framework

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This study presents a scheme based on a lateral-gate structure to achieve high-density integration of electrolyte-gated transistors (EGTs). An electrolyte framework with zeolitic imidazolate frameworks-67 is developed to enhance the array performance. The integrated array demonstrates high performance and homogeneity, providing a solid reference for the integration of EGTs.
The artificial synapse array with an electrolyte-gated transistor (EGT) as an array unit presents considerable potential for neuromorphic computation. However, the integration of EGTs faces the drawback of the conflict between the polymer electrolytes and photo-lithography. This study presents a scheme based on a lateral-gate structure to realize high-density integration of EGTs and proposes the integration of 100 x 100 EGTs into a 2.5 x 2.5 cm2 glass, with a unit density of up to 1600 devices cm-2. Furthermore, an electrolyte framework is developed to enhance the array performance, with ionic conductivity of up to 2.87 x 10-3 S cm-1 owing to the porosity of zeolitic imidazolate frameworks-67. The artificial synapse array realizes image processing functions, and exhibits high performance and homogeneity. The handwriting recognition accuracy of a representative device reaches 92.80%, with the standard deviation of all the devices being limited to 9.69%. The integrated array and its high performance demonstrate the feasibility of the scheme and provide a solid reference for the integration of EGTs. A synaptic device array consisting of 100 x 100 electrolyte-gated transistors are integrated into a TFT glass of 2.5 mm x 2.5 mm using photo-lithography through a lateral-gate structure. With competitive and homogeneous long-term plasticity benefit from electrolyte framework of PEO/PVP/LiTFSI/ZIF-67, the array performed complicated synaptic functions, providing a solid reference for the integration of EGT synaptic devices.image

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