4.7 Article

Hardware acceleration of complex HEP algorithms with HLS and FPGAs: Methodology and preliminary implementation

期刊

COMPUTER PHYSICS COMMUNICATIONS
卷 295, 期 -, 页码 -

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ELSEVIER
DOI: 10.1016/j.cpc.2023.108997

关键词

Field programmable gate array (FPGA); High-level synthesis (HLS); High energy physics (HEP); Hardware computation acceleration; Distributed data acquisition systems (d-DAQ); High-performance computing (HPC)

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The amount of data from modern acquisition systems is increasing, especially in extreme experimental conditions, leading to longer computation times and increased power consumption. This issue is prevalent in world laboratories like CERN and Brookhaven National Laboratory. The paper proposes a methodology to adapt legacy high-energy physics algorithms using FPGAs, providing better performance and real-time system design. The methodology involves separating the work areas between physicists and electronics experts, and consists of several parts such as verification methods, program refactoring, and performance analysis.
The amount of data coming from modern acquisition systems, especially working in extreme experimental conditions, is significantly rising over the years. Combined with complex algorithms, the computation time and power consumption are considerably increasing. The issue usually occurs in many world laboratories, such as CERN, Brookhaven National Laboratory, GSI Helmholtzzentrum fur Schwerionenforschung, and tokamak devices (JET, WEST, MAST, and more). Often well verified, but legacy codes are used as a main computational engine, resulting in weak performance unsuitable for current needs. The paper presents a methodology to appropriately adapt the legacy C/C++ high-energy physics (HEP) algorithms for computation acceleration using FPGAs, which may improve the designing of real-time systems based on verified codes. The main idea is to separate the HLSFPGA code work areas between groups of experts: physicists and electronics. The methodology consists of several parts: interfacing, storage, verification methods, defining the algorithm and data structures, program refactoring in the scope of CPU and FPGA, performance and results analysis, FPGA verification methods, FPGA performance estimation, and automatization of the process. The methodology has been successfully tested by implementing a legacy, complex HEP algorithm for femtoscopy correlations in the HLS framework for FPGA. It works with extensive input data from international experiments, like STAR at RHIC. The implementation and verification were done successfully on the FPGA hardware platform. Following the methodology results in a clearer to analyze and debug HEP code than a machine-generated version by tools. We also confirmed that it is possible to make a working, HLS-compliant program designed by non-FPGA experts. Using the modern implementation tools, FPGA resource usage is low despite unoptimized syntax. It gives a large field for further significant optimizations and good performance. The proposed approach should be interesting to introduce in devices like tokamaks, synchrotrons, and similar, where the real-time monitoring of the experimental processes is essential.

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