Junctionless tunnel field-effect transistor with a modified auxiliary gate, a novel candidate for high-frequency applications

In this paper, we propose a novel junctionless tunnel field-effect transistor that uses a tunneling gate and a modified auxiliary gate. The first one is employed to enhance the DC/AC performance of the device, and the second one is used to suppress the ambipolar conduction. Due to a uniformly doped Silicon body, dopant diffusion and the formation of abrupt P-N junctions are no longer a big concern. We also illustrate that the fabrication process of heterogate junctionless tunneling field-effect transistor (HJL-TFET) is fully compatible with CMOS technology. Using a calibrated device simulator, the impact of non-idealities such as traps and temperature is thoroughly investigated. The quantum confinement, effect which severely degrades low channel thickness TFETs is also assessed. Furthermore, the impact of ferroelectric material on the transfer characteristics of our device has been studied. Based on the results, HJL-TFET shows desirable parameters such as the ION = 345 mu A/mu m, SSAVG = 39.34 mV/dec, ION/IOFF = 5.67 x 108, and fT = 225.5 GHz.

Automated summary

In this paper, a novel junctionless tunnel field-effect transistor (TFET) with a tunneling gate and a modified auxiliary gate is proposed. The tunneling gate enhances the DC/AC performance, while the auxiliary gate suppresses ambipolar conduction. The uniformly doped Silicon body eliminates concerns about dopant diffusion and the formation of abrupt P-N junctions. The compatibility with CMOS technology is also demonstrated, and the impact of non-idealities and quantum confinement is thoroughly investigated.