Scaling limits of monolayer AlN and GaN MOSFETs

The shrinking of transistors to ultra-scale limits is in great demand to extend Moore's law, where the search for proper alternative channel materials is significant. The III-V group compounds are regarded as post-Si candidates for their high electron mobility. Herein, we simulate the monolayer (ML) AlN and GaN metal-oxidesemiconductor field-effect transistors (MOSFETs) with ab initio quantum transport simulation to evaluate their scale limit. The ML AlN and GaN MOSFETs exhibit much better n-type performances than their p-type counterparts, and the n-type ML AlN (GaN) MOSFETs can surpass the International Roadmap for Device and Systems (IRDS, 2022 version) lower-power (LP) and high-performance (HP) target for the year 2028 even at gate length (L-g) of 3 and 2 nm, respectively. Encouragingly, the optimal n-type ML AlN (GaN) MOSFETs possess the highest (second-highest) I-on against all studied n-type ML MOSFETs and propel the L-g limit that outperforms the International Technology Roadmap for Semiconductors (ITRS, 2013 version) LP and HP targets to 2 and 1 (2) nm, respectively.

Automated summary

In this study, monolayer AlN and GaN metal-oxidesemiconductor field-effect transistors (MOSFETs) were simulated using ab initio quantum transport simulation. It was found that the n-type ML AlN (GaN) MOSFETs outperform their p-type counterparts and can exceed the 2028 IRDS low-power and high-performance targets at gate lengths of 3nm and 2nm, respectively. The optimal n-type ML AlN (GaN) MOSFETs exhibit the highest (second-highest) I-on among all studied n-type ML MOSFETs and push the gate length limit beyond the 2013 ITRS targets, reaching 2nm and 1nm for low-power and high-performance, respectively.