3.8 Proceedings Paper

Reliability challenges in Forksheet Devices

出版社

IEEE
DOI: 10.1109/IRPS48203.2023.10118269

关键词

Forksheet FETs; FSH; BDI; Nanosheet FETs; NSH; hot-carrier degradation; HCD; trapping; oxide defects; FET arrays; bottom dielectric isolation

向作者/读者索取更多资源

This study summarizes the time-0 and time-dependent performance of n and p-type FSH field-effect transistors, as well as the separate assessment of NSH chips. Additionally, the impact of using a bottom dielectric isolation instead of junction-based electrical isolation is evaluated.
The forksheet (FSH) device architecture is a possible candidate towards continued logic cell downscaling. It consists of vertically stacked n- and ptype sheets at opposing sides of a dielectric wall. In this work, we overview the time-0 and time-dependent performance of n and p-type FSH field-effect transistors co-integrated with nanosheets (NSH) in individual wafers. A separate assessment of dedicated capacitors yields indications of a non-negligible effect of negative fixed charges trapped in low-temperature deposited SiO2, currently used as dielectric wall liner. Finally, we evaluate the impact of using a bottom dielectric isolation (BDI) instead of a junction-based electrical isolation of the sheets from the substrate.

作者

我是这篇论文的作者
点击您的名字以认领此论文并将其添加到您的个人资料中。

评论

主要评分

3.8
评分不足

次要评分

新颖性
-
重要性
-
科学严谨性
-
评价这篇论文

推荐

暂无数据
暂无数据