A 140GHz RF Beamforming Phased-Array Receiver Supporting > 20dB IRR with 8GHz Channel Bandwidth at Low IF in 22nm FDSOI CMOS

A 140GHz 4-element RF beamforming phased-array receiver (RX) has been demonstrated in 22nm FDSOI CMOS. The proposed single-side-band architecture provides >25dB and >20dB measured image rejection ratio (IRR) across 4GHz and 8GHz channel bandwidth centered at 7GHz intermediate frequency (IF). Each front-end element consists of a wideband low-noise amplifier (LNA) and a vector-modulator phase shifter. The 4 elements are combined on chip through power combiners and driver amplifiers before the double-balanced mixer, which is driven by an on-chip multiplier (x9). The receiver consumes 480mW DC power and provides <10dB noise figure from 135 to 147 GHz. The RX is measured up to 32 and 24Gb/s in the probe and over-the-air test. To the authors' knowledge, this CMOS RF beamforming RX presents the largest channel bandwidth (8GHz) with 20dB IRRmin at low IF consuming the lowest DC power per element (120mW) among the published phased-array RX in the 140GHz band.

Automated summary

This article presents a 140GHz 4-element RF beamforming phased-array receiver (RX) implemented in 22nm FDSOI CMOS. The receiver utilizes a single-side-band architecture and achieves image rejection ratios of >25dB and >20dB across 4GHz and 8GHz channel bandwidth centered at 7GHz intermediate frequency (IF). The RX consumes 480mW DC power, has a noise figure of <10dB from 135 to 147 GHz, and achieves data rates of up to 32Gb/s and 24Gb/s in probe and over-the-air tests.