4.5 Article

Transfer Bandwidth Optimization for Multichannel Time-Correlated Single-Photon-Counting Systems Using a Router-Based Architecture: New Advancements and Results

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PHOTONICS
卷 10, 期 11, 页码 -

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MDPI
DOI: 10.3390/photonics10111227

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in vivo; imaging; multichannel; delay line; photon; router; SPAD; TCSPC

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Time-correlated single-photon counting (TCSPC) is a technique for time-resolved measurement of fast and weak light signals. The traditional TCSPC method is relatively slow, but a new router-based architecture shows promise in increasing the measurement speed. This paper presents a new logic for the router-based architecture and introduces a new integrated delay line and timing-signal distribution method.
Time-correlated single-photon counting (TCSPC) is a powerful technique for time-resolved measurement of fast and weak light signals used in a variety of scientific fields, including biology, medicine, and quantum cryptography. Unfortunately, given its repetitive nature, TCSPC is recognized as a relatively slow technique. In the last ten years, attempts have been made to speed it up by developing multichannel integrated architectures. Yet, for the solutions proposed thus far, the measurement speed has not increased proportionally to the number of channels, reducing the benefits of a multichannel approach. Recent theoretical studies and prototypes have shown that it is possible to implement a new multichannel architecture, so-called router-based architecture, capable of optimizing the efficiency of data transfer from the integrated chip to the data processor, increasing the overall measurement speed. However, the first implementations failed to achieve the theoretical results due to implementation flaws. In this paper, we present a new logic for the router-based architecture that can operate at the same laser frequency and solve the issues of the previous implementation. Alongside the new logic, we present a new integrated low-jitter delay line combined with a new method for timing-signal distribution that allows the proper management of the pixel timing information. The new implementation is a step closer to realizing a router-based architecture that achieves the expected theoretical results. Simulations and bench tests support the results here reported.

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