4.7 Article

Integrated Logic Circuits Based on Wafer-Scale 2D-MoS2 FETs Using Buried-Gate Structures

期刊

NANOMATERIALS
卷 13, 期 21, 页码 -

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MDPI
DOI: 10.3390/nano13212870

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molybdenum disulfide; buried-gate structure; logic circuits; gate controllability; wafer-scale integration

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Two-dimensional transition-metal dichalcogenides (TMDs) materials, such as molybdenum disulfide (MoS2), have outstanding electrical properties and atomically thin layered structure, making them a potential main material for future high-performance logic circuits. However, local back-gate-based MoS2 transistors on a silicon substrate can degrade electrical characteristics. The use of buried-gate-based MoS2 transistors, where the gate electrodes are embedded into the silicon substrate, significantly enhances various device parameters and allows for the fabrication of integrated logic circuits.
Two-dimensional (2D) transition-metal dichalcogenides (TMDs) materials, such as molybdenum disulfide (MoS2), stand out due to their atomically thin layered structure and exceptional electrical properties. Consequently, they could potentially become one of the main materials for future integrated high-performance logic circuits. However, the local back-gate-based MoS2 transistors on a silicon substrate can lead to the degradation of electrical characteristics. This degradation is caused by the abnormal effect of gate sidewalls, leading to non-uniform field controllability. Therefore, the buried-gate-based MoS2 transistors where the gate electrodes are embedded into the silicon substrate are fabricated. The several device parameters such as field-effect mobility, on/off current ratio, and breakdown voltage of gate dielectric are dramatically enhanced by field-effect mobility (from 0.166 to 1.08 cm(2)/Vs), on/off current ratio (from 4.90 x 10(5) to 1.52 x 10(7)), and breakdown voltage (from 15.73 to 27.48 V) compared with a local back-gate-based MoS2 transistor, respectively. Integrated logic circuits, including inverters, NAND, NOR, AND, and OR gates, were successfully fabricated by 2-inch wafer-scale through the integration of a buried-gate MoS2 transistor array.

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