期刊
MICROELECTRONICS JOURNAL
卷 139, 期 -, 页码 -出版社
ELSEVIER SCI LTD
DOI: 10.1016/j.mejo.2023.105899
关键词
Regulator; LDO; IC design; Low quiescent; Bandgap; Reference; DFT
This article describes the design and fabrication of a high-performance linear low dropout regulator (LDO) capable of supplying 1 A of output current in the 180 nm BCD technology of STMicroelectronics. The LDO is designed to provide a stable output voltage for high-resolution sensors in cellphone cameras. It features a large N-channel power transistor, enabling an ultra-low dropout voltage of around 50 mV at a load current of 1 A, even at a low output voltage of 0.4 V. The LDO also ensures a 1% accuracy of the output voltage across full temperature range and line and load conditions, along with a very low quiescent current, good transient response, and high power supply rejection ratio (PSRR) of more than 85 dB at 1 kHz. The LDO is programmable, allowing for setting the output voltage and other functions through post-package electrical trimming. Additionally, an efficient design for testability (DFT) is implemented to ensure high quality and reduce the number of failed parts.
In this article, design and realization of a high-performance linear low dropout regulator (LDO) capable of supplying 1 A of output current, designed and fabricated in 180 nm BCD technology of STMicroelectronics company, is described. The main purpose of this device is providing a stable output voltage for supplying highresolution sensors of cameras in cellphones. The LDO is equipped with a big N-channel power transistor allowing an ultra-low dropout voltage around 50 mV at the maximal load current of 1 A even with a very low level of the output voltage of only 0.4 V. These features make the device suitable as a block following buck switching converters. Emphasis has been laid on assuring 1% accuracy of the output voltage across full temperature range and line and load conditions, very low quiescent current around 32 & mu;A, necessary for battery powered applications such as cellphones, good transient response and a high power supply rejection ratio (PSRR) of more than 85 dB at 1 kHz. This combination of high-level parameters stands for an extraordinary device. The proposed LDO is a programmable device which means that the output voltage (up to 100 voltage versions in total) and other functions can be set via post-package electrical trimming. Last but not least, an efficient design for testability (DFT) is implemented in order to reduce the failed parts to a very low level, guaranteeing the highest quality level needed in the market.
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