TARO: Automatic Optimization for Free-Running Kernels in FPGA High-Level Synthesis

Streaming applications have become one of the key application domains for high-level synthesis (HLS) tools. For a streaming application, there is a potential to simplify the control logic by regulating each task with a stream of input and output data. This is called free-running optimization. But it is difficult to understand when such optimization can be applied without changing the functionality of the original design. Moreover, it takes a large effort to manually apply the optimization across legacy codes. In this article, we present the TARO framework which automatically applies the free-running optimization on HLS-based streaming applications. TARO simplifies the control logic without degrading the clock frequency or the performance. Experiments on Alveo U250 shows that we can obtain an average of 16% LUT and 45% FF reduction for streaming-based systolic array designs.

Automated summary

Streaming applications can be optimized through free-running optimization, which simplifies the control logic without impacting clock frequency or performance. However, determining when to apply this optimization without changing the original functionality is challenging, and manually applying it to legacy codes is time-consuming. This article presents the TARO framework, which automatically applies free-running optimization to HLS-based streaming applications. Experimental results on Alveo U250 demonstrate an average reduction of 16% LUT and 45% FF for streaming-based systolic array designs.