Optimized recess etching criteria for T-gate fabrication achieving ft=290 GHz at Lg=124 nm in metamorphic high electron mobility transistor with In0.7Ga0.3As channel

The authors propose criteria for recess etching to fabricate T-gate used in InGaAs high electron mobility transistors (HEMTs). By patterning additional rectangular pads on the source and drain metals in the e-beam lithography step, it is possible to measure the drain-to-source resistance (R-ds) and current (I-ds). The ratio (& UGamma;) of before and after etching for each R-ds and I-ds can be used as criteria to determine the point in time to stop etching. By performing recess etching with & UGamma;= 1.97 for R-ds and & UGamma;= 0.38 for I-ds on an epiwafer having cap doping concentration of 2 x 10(19) cm(-3) and channel indium content of 0.7, the authors have fabricated InGaAs metamorphic high electron mobility transistor (mHEMT) device showing g(m,max)= 1603 mS/mm and f(t)= 290 GHz at L-g= 124 nm. The criteria presented can be applied to InGaAs HEMTs with various epitaxial structures.

Automated summary

The authors propose criteria for recess etching in order to fabricate T-gates for InGaAs high electron mobility transistors (HEMTs). By patterning additional rectangular pads on the source and drain metals during e-beam lithography, they are able to measure the drain-to-source resistance (R-ds) and current (I-ds). The ratio (& UGamma;) of R-ds and I-ds before and after etching can be used as a criterion to determine the optimal time to stop the etching process. By applying the proposed criteria, the authors have successfully fabricated InGaAs metamorphic HEMTs with excellent performance.