相关参考文献
注意:仅列出部分参考文献,下载原文获取全部文献信息。A Variation-Aware Ternary True Random Number Generator Using Magnetic Tunnel Junction at Subcritical Current Regime
Fatemeh Khodayari et al.
IEEE TRANSACTIONS ON MAGNETICS (2023)
A high-capacity and nonvolatile spintronic associative memory hardware accelerator
Mahan Rezaei et al.
IET CIRCUITS DEVICES & SYSTEMS (2023)
Towards Nonvolatile Spintronic Quaternary Flip-Flop and Register Design
Motahareh BahmanAbadi et al.
SPIN (2023)
GraphA: An efficient ReRAM-based architecture to accelerate large scale graph processing
Seyed Ali Ghasemi et al.
JOURNAL OF SYSTEMS ARCHITECTURE (2022)
Efficient and Highly Reliable Spintronic Non-volatile Quaternary Memory Based on Carbon Nanotube FETs and Multi-TMR MTJs
Motahareh BahmanAbadi et al.
ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY (2022)
A process variation resilient spintronic true random number generator for highly reliable hardware security applications
Mehrdad Morsali et al.
MICROELECTRONICS JOURNAL (2022)
Theoretical Circuit Design of an Efficient Spintronic Random Number Generator With an Internal Postprocessing Unit
Saeed Mehri et al.
IEEE MAGNETICS LETTERS (2022)
Exploiting Carbon Nanotube FET and Magnetic Tunneling Junction for Near-Memory-Computing Paradigm
Nan Yang et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2021)
High-Performance Spintronic Nonvolatile Ternary Flip-Flop and Universal Shift Register
Abdolah Amirany et al.
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS (2021)
MTMR-SNQM: Multi-Tunnel Magnetoresistance Spintronic Non-volatile Quaternary Memory
Abdolah Amirany et al.
2021 IEEE 51ST INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC (ISMVL 2021) (2021)
Compact design of an MTJ-based non-volatile CAM cell with read/write operations
Aminul Islam et al.
MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS (2020)
Multi-digit Binary-to-Quaternary and Quaternary-to-Binary Converters and Their Applications in Nanoelectronics
Maryam Ghelichkhan et al.
CIRCUITS SYSTEMS AND SIGNAL PROCESSING (2020)
A Low-Cost Highly Reliable Spintronic True Random Number Generator Circuit for Secure Cryptography
Iman Alibeigi et al.
SPIN (2020)
A novel low complexity and energy-efficient method to implement quaternary logic function in nanoelectronics
Seied Ali Hosseini et al.
MICROELECTRONICS JOURNAL (2020)
Design of an efficient fully nonvolatile and radiation-hardened majority-based magnetic full adder using FinFET/MTJ
Sina Bakhtavari Mamaghani et al.
MICROELECTRONICS JOURNAL (2020)
A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits
Sunmean Kim et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2020)
True Random Number Generator for Reliable Hardware Security Modules Based on a Neuromorphic Variation-Tolerant Spintronic Structure
Abdolah Amirany et al.
IEEE TRANSACTIONS ON NANOTECHNOLOGY (2020)
A New Method for Design of CNFET-Based Quaternary Circuits
Akbar Doostaregan et al.
CIRCUITS SYSTEMS AND SIGNAL PROCESSING (2019)
Pure Magnetic Logic Circuits: A Reliability Analysis
Vahid Jamshidi et al.
IEEE TRANSACTIONS ON MAGNETICS (2018)
A high-reliability and low-power computing-in-memory implementation within STT-MRAM
Liuyang Zhang et al.
MICROELECTRONICS JOURNAL (2018)
A Spintronic Voltage-Controlled Stochastic Oscillator for Event-Driven Random Sampling
H. Lee et al.
IEEE ELECTRON DEVICE LETTERS (2017)
A Compact Virtual-Source Model for Carbon Nanotube FETs in the Sub-10-nm Regime-Part II: Extrinsic Elements, Performance Assessment, and Design Optimization
Chi-Shuen Lee et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2015)
A Compact Virtual-Source Model for Carbon Nanotube FETs in the Sub-10-nm Regime-Part I: Intrinsic Elements
Chi-Shuen Lee et al.
IEEE TRANSACTIONS ON ELECTRON DEVICES (2015)
Spin dice: A scalable truly random number generator based on spintronics
Akio Fukushima et al.
APPLIED PHYSICS EXPRESS (2014)
Compact model of magnetic tunnel junction with stochastic spin transfer torque switching for reliability analyses
Y. Wang et al.
MICROELECTRONICS RELIABILITY (2014)
Tunnel magnetoresistance of 604% at 300 K by suppression of Ta diffusion in CoFeB/MgO/CoFeB pseudo-spin-valves annealed at high temperature
S. Ikeda et al.
APPLIED PHYSICS LETTERS (2008)
Design of CMOS ternary latches
Xiaoqiang Shou et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2006)