4.6 Article

Investigation of Electro-Thermal Performance for TreeFET from the Perspective of Structure Parameters

期刊

ELECTRONICS
卷 12, 期 7, 页码 -

出版社

MDPI
DOI: 10.3390/electronics12071529

关键词

gate-all-around (GAA); TreeFET; interbridge; nanosheet; geometry parameters; electro-thermal; self-heating effects

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By using TCAD simulation, the electro-thermal properties of TreeFET are investigated and optimized by considering the interbridge width, nanosheet space, and nanosheet width. It is found that a smaller interbridge width mitigates short-channel effects and increases electron concentration, but also increases thermal resistance. A larger nanosheet space increases on-state current and compensates for gate drive loss, but results in longer conduction paths, limiting further improvements. Additionally, a suitable nanosheet width is required to lessen the decline of gate controllability induced by interbridge channels. Therefore, suitable geometry parameters should be selected to achieve a compromise between thermal and electrical performance.
In this work, the electro-thermal properties of TreeFET, which combines vertically stacked nanosheet (NS) and fin-shaped interbridge (IB) channels, are investigated in terms of interbridge width (W-IB), nanosheet space (S-NS) and nanosheet width (W-NS) by TCAD simulation. Electrical characteristics such as electron density distributions, on/off-state current (I-ON, I-OFF), subthreshold swing (SS) and self-heating effects (SHE) such as lattice temperature and thermal resistance (R-th) are systematically studied to optimize the performance of TreeFET. The result shows that a smaller W-IB mitigates the short-channel effects and increases the electron concentration in NS channels but increases thermal resistance. A larger S-NS increases the on-state current while compensating for the gate drive loss and mitigating the thermal coupling effect between NS channels but results in longer conduction paths of carriers and heat, which hinders further improvements. Moreover, a suitable W-NS is required to lessen the decline of gate controllability induced by IB channels. Hence, suitable geometry parameters should be selected to achieve a compromise between thermal and electrical performance.

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