Efficient GaN-on-Si Power Amplifier Design Using Analytical and Numerical Optimization Methods for 24-30 GHz 5G Applications

This paper presents the design procedure of an efficient compact monolithic microwave integrated circuit power amplifier (MMIC PA) in a 0.1 mu m GaN-on-Si process for 5G millimeter-wave communication. Load/source-pull simulations were conducted to correctly create equivalent large-signal matching models for stabilized power cells and to determine the optimal impedance domain. The shorted stub with bypass capacitors minimizes the transistor's output reactance, simplifying the matching objective to an approximate real impedance transformation (IT). With miniaturization as the implementation guide, explicit formulas and tabulated methods based on mathematical analysis were applied to synthesize the filtering matching networks (MNs) for the input and output stages. In addition, a CAD-dependent numerical optimization approach was used for the interstage MN that needs to cope with high IT ratio and complex loads. The continuous-wave (CW) characterization for the proposed two-stage PA demonstrated 19.8 +/- 0.7 dB of small-signal gain, very flat output power (Pout) and power-added efficiency (PAE) at 4 dB gain compression of 32-32.4 dBm and 34-34.6%, respectively, over 24-30 GHz, with 37.1% of peak PAE at mid-frequency.

Automated summary

This paper presents the design procedure of a compact and efficient monolithic microwave integrated circuit power amplifier (MMIC PA) for 5G millimeter-wave communication using a 0.1 μm GaN-on-Si process. Load/source-pull simulations were conducted to create accurate matching models and determine the optimal impedance domain. The design incorporates miniature size, explicit formulas, and numerical optimization to synthesize matching networks for the input and output stages, resulting in high performance over a wide frequency range.