Deuterated SiNx: a low-loss, back-end CMOS-compatible platform for nonlinear integrated optics

Silicon nitride (SiN) has surged into prominence as a material for photonic-integrated circuits (PICs) in the past decade, well regarded for its broadband transparency, compatibility with complementary metal oxide semiconductor (CMOS) fabrication processes and high optical bandgap that avoids two-photon absorption. However, current fabrication methods result in users having to choose between low thermal budgets and low losses, which are suboptimal given that both are necessary to facilitate a wide range of applications. Recently, works have emerged featuring PICs fabricated using deuterated silicon nitride (SiNx:D) - SiNx films grown using deuterated precursors instead of conventional hydrogenated ones. This decreases material absorption near the telecommunications bands at 1.55 mu m previously present due to parasitic silicon-hydrogen and nitrogen-hydrogen bonds, attaining low-loss PICs realised using a low temperature, back-end-of-line CMOS-compatible fabrication plasma-enhanced chemical vapour deposition process. These devices have shown promise for both linear and nonlinear applications and the platform has the potential to be instrumental in realising highly efficient chips with co-packaged electronics and photonics devices. This paper reviews recent developments on the SiNx:D platform and provides a glance at future advancements for this highly promising material.

Automated summary

Silicon nitride (SiN) has become a popular choice for photonic-integrated circuits (PICs) due to its broadband transparency, compatibility with CMOS fabrication processes, and high optical bandgap. However, current fabrication methods result in trade-offs between low thermal budgets and low losses. Recent research has focused on using deuterated silicon nitride (SiNx:D) to achieve low-loss PICs through a low-temperature, CMOS-compatible process. These devices show promise for both linear and nonlinear applications and have the potential to enable highly efficient chips with co-packaged electronics and photonics devices.