Subpicosecond resolution time interval counter with multisampling wave union type B TDCs in 28 nm FPGA device

We present the design, operation, and test results of a novel integrated time interval counter that provides exceptionally high resolution (0.4 ps) and precision (2.6 ps rms in the best case scenario). The operation principle of the counter is based on the multisampling wave union (WU) method, involving both types of WU launchers, A and B, and implemented in Xilinx Kintex-7 FPGA device. The crucial for obtaining high performance of the counter was both the careful manual placing and routing of key components, and the efficient pre-encoder design, which substantially limited the bubble errors. Two approaches to implement the pre-encoder in the FPGA chip, i.e. logic resources saving or throughput enhancing (up to 385 MSa/s), were examined. Thermal tests, performed in the range of 40 degrees C, made it possible to verify the temperature dependence of all main parameters of the counter, such as precision, resolution and offset.

Automated summary

This paper presents the design, operation, and test results of a novel integrated time interval counter that achieves exceptionally high resolution (0.4 ps) and precision (2.6 ps rms in the best case scenario). The counter operates based on the multisampling wave union (WU) method, utilizing both types of WU launchers, A and B, and implemented in Xilinx Kintex-7 FPGA device. Key factors contributing to the high performance of the counter include careful manual placement and routing of key components, as well as an efficient pre-encoder design to minimize bubble errors. Two approaches for implementing the pre-encoder in the FPGA chip, focused on logic resources saving or throughput enhancement (up to 385 MSa/s), were investigated. Thermal tests conducted in the range of 40 degrees C confirmed the temperature dependence of important parameters such as precision, resolution, and offset.