4.6 Article

Effect of Al2O3 layer thickness on leakage current and dielectric properties of atomic layer deposited Al2O3/TiO2/Al2O3 nano-stack

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To address leakage current issues in single layer oxide thin films, Al2O3/TiO2/Al2O3 (ATA) nano-stacks were fabricated using atomic layer deposition technique. By introducing 1-5 nm barrier layers, leakage paths were reduced and charge carriers were trapped at the interfaces, resulting in improved leakage current density, breakdown field, and dielectric loss. The ATA structure with a thickness of approximately 1 nm demonstrated high capacitance density, low dielectric loss, and low leakage current density, making it a promising material for energy storage and gate dielectric applications.
In order to develop an alternate high-k and low-loss dielectric material for high density energy storage and gate oxide applications and to address the leakage current issues in single layer oxide thin films, nano-stacked devices with the active oxide layer sandwiched between higher bandgap barrier layers have recently been extensively explored. Here, we report the fabrication of Al2O3/TiO2 (20 nm)/Al2O3 (ATA) nano-stacks using an optimized atomic layer deposition technique, where the effect of the Al2O3 barrier layer thickness on leakage and dielectric properties was thoroughly explored. The high dielectric loss (> 1) and leakage current values (> 10(-4) A/cm(2)) exhibited by similar to 20 nm TiO2 thin film was reduced significantly by encapsulating with Al2O3 barrier layer. Introducing barrier layer thickness from 1 to 5 nm, the leakage paths are substantially reduced and the charge carriers are effectively trapped at the interfaces, leading to a significant improvement in leakage current density (reduction from similar to 7.47 x 10(-7) to 1.21 x 10(-9) A/cm(2) at 1 V applied bias), breakdown field (increase from 0.8 to 1.75 MV/cm) and dielectric loss (reduction from 0.1 to 0.06). Furthermore, the capacitance density of a particular ATA structure was found to be invariant with applied bias voltage (- 1 V to + 1 V) and frequency (10 kHz to 1 MHz), demonstrating its potential in various high frequency capacitive circuit applications. Notably, the ATA structure having barrier layer thickness of similar to 1 nm, demonstrated a significantly high capacitance density (similar to 13.2 fF/mu m(2)), low dielectric loss (similar to 0.1) and low leakage current density (similar to 7.47 x 10(-7) A/cm(2) @1 V bias), making this ATA stack a promising material for high-density energy storage and gate dielectric applications.

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