Spintronics memory using magnetic tunnel junction for X nm-generation

The feasibility of X nm-generation scaling with magnetic tunnel junctions (MTJs) in spintronic memory is aimed at keeping up with state-of-the-art transistor scaling. Magnetocrystalline anisotropy, shape magnetic anisotropy, and multi-interfacial magnetic anisotropy have been proposed to overcome thermal fluctuation even at the X nm-generation. The high magnetocrystalline anisotropy of the L1(0)-ordered alloy combined with graphene as a tunneling barrier in the MTJs was the main concern in this study, and their potential for scaling for both 10 year data retention and nanosecond writing efficiency by micromagnetic simulation is investigated. Data retention of 10 years and high-speed writing of 2.2 ns are simultaneously achieved in the MTJs with a junction diameter of 7 nm.

Automated summary

The feasibility of scaling X nm-generation spintronic memory using magnetic tunnel junctions (MTJs) is investigated in order to keep up with the scaling of state-of-the-art transistors. Various solutions including magnetocrystalline anisotropy, shape magnetic anisotropy, and multi-interfacial magnetic anisotropy are proposed to overcome thermal fluctuation even at the X nm-generation. This study focuses on the high magnetocrystalline anisotropy of L1(0)-ordered alloy combined with graphene as a tunneling barrier in MTJs, and investigates their scaling potential for both 10-year data retention and nanosecond writing efficiency through micromagnetic simulation. By using a junction diameter of 7 nm, the MTJs achieve 10-year data retention and high-speed writing of 2.2 ns simultaneously.