4.4 Article

A true random number generator with high bit rate and low energy efficiency

期刊

出版社

WILEY
DOI: 10.1002/cta.3563

关键词

feedback architecture; phase jitter; ring oscillator; true random number generator

向作者/读者索取更多资源

In this paper, a novel feedback architecture based on tetrahedral ring oscillator is proposed to improve the bit rate and randomness of random sequence. The random raw bits are fed back to produce control voltages, increasing the phase jitter of the oscillator. A post-processor is designed to enhance the randomness further. The circuit is implemented in TSMC 40-nm CMOS process, with low power consumption, high speed, and low energy efficiency.
In this paper, a novel feedback architecture of true random number generator based on tetrahedral ring oscillator is proposed. The random raw bits are fed back to produce control voltages, which control the transmission gates in ring oscillators. Since random fluctuations of the control voltages increase the phase jitter of the oscillator, this architecture improves the bit rate and randomness of random sequence. Besides, a post-processor is designed to enhance the randomness further. The circuit is implemented in TSMC 40-nm complementary metal oxide semiconductor (CMOS) process, and it takes up an area of 85 x 51 mu m. Measurement results show that the random number sequences pass the statistical randomness tests, with a low power consumption of 67 mu W, high speed of 45 Mbps, and low energy efficiency of 1.48 pJ/bit.

作者

我是这篇论文的作者
点击您的名字以认领此论文并将其添加到您的个人资料中。

评论

主要评分

4.4
评分不足

次要评分

新颖性
-
重要性
-
科学严谨性
-
评价这篇论文

推荐

暂无数据
暂无数据