期刊
IEEE TRANSACTIONS ON ELECTRON DEVICES
卷 70, 期 5, 页码 2317-2323出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2023.3261281
关键词
Amorphous indium gallium zinc oxide (a-IGZO); hafnium oxide (HfO2); plasma-enhanced atomic layer deposition (PEALD); positive gate bias temperature stability (PBTS); thin-film transistors (TFTs)
This article investigates the stability mechanism of amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) with a natural length of around 8 nm, focusing on the point defects in hafnium oxide (HfO2) gate dielectric. The point defects in HfO2 respond to external stresses, such as electric field and temperature, with oxygen vacancies and positively charged defects causing abnormal negative shifts in threshold voltage under positive gate bias temperature stress (PBTS). The insertion of a 0.7-nm-thick ultrathin SiO2 interlayer between a-IGZO and optimized HfO2 further enhances device performance and stability.
In this article, the mechanism of stability in amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) with a natural length of similar to 8 nm was investigated from the perspective of hafnium oxide (HfO2) gate dielectric point defects. The point defects in HfO2 responded to external stresses such as electric field (E) and temperature. In particular, oxygen vacancies and the positively charged defects caused an abnormal negative shift in threshold voltage (VTH) under positive gate bias temperature stress (PBTS). Therefore, reducing the positively charged defects was important to eliminate the abnormal behavior. Inserting a 0.7-nm-thick ultrathin SiO2 interlayer between a-IGZO and optimized HfO2 further improved device performance including stability. Consequently, the resultant a-IGZO TFT exhibited promising device performance with mu(FE) of 22.3 + 0.5 cm(2)V(-1)s(-1), subthreshold swing (SS) of 64 + 0.5 mVdec(-1), hysteresis of 4 mV, and Delta V-TH of 124 mV under harsh PBTS with E of 4 MV/cm at 80 degrees C for 3600 s.
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