A Rapid Matching Network Layout Synthesis and Optimization Method for High-Performance MMIC PAs Using Modified Implicit Space Mapping

In this brief, a new systematic approach of matching network (MN) layout synthesis and optimization for power amplifiers (PAs) is proposed based on implicit space mapping (ISM). Commonly, the performance discrepancy between schematic and initial layout is huge, especially for millimeter wave (mmWave) PAs. To address this issue, the proposed modified ISM can shift the optimization work to the circuit schematic simulations by calibrating carefully-selected auxiliary parameters in the circuit based on EM data. To validate the proposed method, an eligible dual-band inter-stage MN layout is rapidly optimized with only 10 runs of EM-simulations, while a corresponding 16/26.5 GHz concurrent dual-band PA is implemented in a 0.15- $\mu \text{m}$ GaAs pHEMT technology. It exhibits a measured small-signal gain of 21.7/14.1 dB, peak power-added efficiency of 30.2%/40.5%, and saturated output power of 24.8/28.1 dBm with a compact chip size of 2.4 mm(2).

Automated summary

In this paper, a new systematic approach of matching network (MN) layout synthesis and optimization for power amplifiers (PAs) is proposed based on implicit space mapping (ISM). The proposed modified ISM can shift the optimization work to the circuit schematic simulations by calibrating carefully-selected auxiliary parameters in the circuit based on EM data. To validate the proposed method, an eligible dual-band inter-stage MN layout is rapidly optimized with only 10 runs of EM-simulations, while a corresponding 16/26.5 GHz concurrent dual-band PA is implemented in a 0.15-μm GaAs pHEMT technology. It exhibits a measured small-signal gain of 21.7/14.1 dB, peak power-added efficiency of 30.2%/40.5%, and saturated output power of 24.8/28.1 dBm with a compact chip size of 2.4 mm(2).