BETTER: Bayesian-Based Training and Lightweight Transfer Architecture for Reliable and High-Speed Memristor Neural Network Deployment

Deep learning models implemented using memristors show high scalability and high energy efficiency, promising a compact and efficient computing architecture for resource-constrained edge computing applications. These technologies integrate both data storage and computation simultaneously in a highly parallel memristor crossbar array architecture. However, the significant variations arising from the inherent physical randomness of memristors lead to a large performance degradation of deep learning models. The challenges of extensive energy costs and transfer time for deployment to maintain performance are faced. In this brief, for the first time, we propose a unified architecture that consists of a Bayesian-based training method and a lightweight transfer scheme. The proposed architecture can tackle the robustness, energy and time consumption issues caused by memristor variations. Our experimental results show that our architecture can double the speed and energy efficiency of deploying deep learning models.

Automated summary

Deep learning models implemented using memristors offer high scalability and energy efficiency for resource-constrained edge computing applications. However, the inherent physical randomness of memristors leads to significant performance degradation. In this study, a unified architecture incorporating a Bayesian-based training method and lightweight transfer scheme is proposed to address the robustness, energy, and time consumption issues caused by memristor variations. Experimental results demonstrate that this architecture can double the speed and energy efficiency of deploying deep learning models.