4.7 Article

FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge

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IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2023.3251961

关键词

FeFETs; Sensors; Nonvolatile memory; Computer architecture; Microprocessors; Energy efficiency; Logic gates; Computing-in-memory; processing-in-memory; logic-in-memory; FeFET; ferroelectric; nonvolatile memory

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Bitwise logic-in-memory (BLiM) is a promising approach to efficient computing in data-intensive applications. This work proposes a new BLiM approach based on ferroelectric field-effect transistors (FeFETs), supporting various computing functions and achieving higher energy efficiency and speed. The evaluation shows significant improvements in latency and energy consumption for typical operations, such as in-memory XOR and the advanced encryption standard (AES).
Bitwise logic-in-memory (BLiM) is a promising approach to efficient computing in data-intensive applications by reducing data movement between memory and processing units. However, existing BLiM techniques have challenges towards higher energy efficiency and speed: (i) DC power in computing and result sensing is significant in most existing RRAM and MRAM based BLiM solutions; (ii) before the computation result could be stored back to the same memory array, existing BLiM has to sense the result first, at the cost of extra power and latency due to the sense amplifiers (SAs). Targeting at higher energy efficiency and speed, this work proposes a new BLiM approach in 2-transistor/ cell (2T/C) and 3T/C topologies based on ferroelectric field-effect transistors (FeFETs), supporting a variety of computing functions. For the first time, this new approach supports SA-free direct write-back, and consumes no static power for computing and sensing with proposed fully dynamic computing and sensing schemes. Another highlight is that this work further minimizes the dynamic power by (i) reducing the chance of bitline charging activities and (ii) recycling the bitline charge in sensing multi-operand operations. Compared with prior BLiM methods based on nonvolatile memories, evaluation shows 3.0x-100x latency and 1.3x-200x energy improvement for typical in-memory xor operation, which further leads to 3.0x-58x and 3.2x-78x savings of latency and energy, respectively, for the application of advanced-encryption standard (AES).

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