4.8 Article

Double-Floating-Gate van der Waals Transistor for High-Precision Synaptic Operations

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ACS NANO
卷 17, 期 8, 页码 7384-7393

出版社

AMER CHEMICAL SOC
DOI: 10.1021/acsnano.2c11538

关键词

neuromorphic computing; 2D materials; vdW heterostructure; floating gate memory; synaptic device

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Two-dimensional materials and their heterostructures, such as van der Waals (vdW) integrated synaptic transistors, offer advantages such as near-atom thickness, superior electrostatic control, and adjustable device architecture. In this study, a double-floating-gate (DFG) device with multistacked floating gates was developed, showcasing improved nonvolatile memory performance and effective modulation of trapped charge density. The DFG transistor demonstrated improved weight update profile for long-term potentiation/depression synaptic behavior, achieving high classification accuracies in neural network tasks.
Two-dimensional materials and their heterostructures have thus far been identified as leading candidates for nanoelectronics owing to the near-atom thickness, superior electrostatic control, and adjustable device architecture. These characteristics are indeed advantageous for neuro-inspired computing hardware where precise programming is strongly required. However, its successful demonstration fully utilizing all of the given benefits remains to be further developed. Herein, we present van der Waals (vdW) integrated synaptic transistors with multistacked floating gates, which are reconfigured upon surface oxidation. When compared with a conventional device structure with a single floating gate, our double-floating-gate (DFG) device exhibits better nonvolatile memory performance, including a large memory window (>100 V), high on-off current ratio (similar to 107), relatively long retention time (>5000 s), and satisfactory cyclic endurance (>500 cycles), all of which can be attributed to its increased charge-storage capacity and spatial redistribution. This facilitates highly effective modulation of trapped charge density with a large dynamic range. Consequently, the DFG transistor exhibits an improved weight update profile in long-term potentiation/ depression synaptic behavior for nearly ideal classification accuracies of up to 96.12% (MNIST) and 81.68% (FashionMNIST). Our work adds a powerful option to vdW-bonded device structures for highly efficient neuromorphic computing.

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