期刊
ELECTRONICS
卷 11, 期 23, 页码 -出版社
MDPI
DOI: 10.3390/electronics11233883
关键词
deep neural network; field-programmable-gate-array (FPGA); re-synthesizable; RTL; hardware accelerator
资金
- Institute of Information & communications Technology Planning & Evaluation (IITP) - Republic of Korea government(MSIT) [2019-0-00421]
- MSIT (Ministry of Science and ICT), Republic of Korea, under the ICT Creative Consilience Program [IITP-2022-2020-0-01821]
In this paper, a re-configurable CNN engine design method is proposed. The modeling is done using TensorFlow and Keras libraries in Python, and the register-transfer-level design is performed using Verilog. The proposed design achieves a competitive accuracy of approximately 96% on the MNIST and CIFAR-10 datasets.
Convolutional neural networks (CNNs) have become a primary approach in the field of artificial intelligence (AI), with wide range of applications. The two computational phases for every neural network are; the training phase and the testing phase. Usually, testing is performed on high-processing hardware engines, however, the training part is still a challenge for low-power devices. There are several neural accelerators; such as graphics processing units and field-programmable-gate-arrays (FPGAs). From the design perspective, an efficient hardware engine at the register-transfer level and efficient CNN modeling at the TensorFlow level are mandatory for any type of application. Hence, we propose a comprehensive, and step-by-step design procedure for a re-configurable CNN engine. We used TensorFlow and Keras libraries for modeling in Python, whereas the register-transfer-level part was performed using Verilog. The proposed idea was synthesized, placed, and routed for 180 nm complementary metal-oxide semiconductor technology using synopsis design compiler tools. The proposed design layout occupies an area of 3.16 x 3.16 mm(2). A competitive accuracy of approximately 96% was achieved for the Modified National Institute of Standards and Technology (MNIST) and Canadian Institute for Advanced Research (CIFAR-10) datasets.
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