Machine Learning in Advanced IC Design: A Methodological Survey

Article Computer Science, Hardware & Architecture

Faster Region-Based Hotspot Detection

Ran Chen et al.

Summary: This article proposes a new end-to-end framework that can efficiently detect multiple hotspots in a large region and improves performance.

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2022)

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Article Computer Science, Hardware & Architecture

Analog Integrated Circuit Topology Synthesis With Deep Reinforcement Learning

Zhenxin Zhao et al.

Summary: This article presents a novel deep reinforcement learning based method for the topology synthesis of analog-integrated circuits, particularly operational amplifiers. The proposed method behaves like a human designer, learning from trials to gradually evolve and find the optimal circuit topologies.

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2022)

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Article Computer Science, Hardware & Architecture

Correlated Multi-objective Multi-fidelity Optimization for HLS Directives Design

Qi Sun et al.

Summary: High-level synthesis (HLS) tools simplify the implementation of modern applications on FPGA by using high-level languages and HLS directives. However, finding good HLS directives is challenging. To address this, a novel automatic optimization algorithm is proposed to explore multiple objectives by utilizing data from different FPGA design stages.

ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS (2022)

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Article Computer Science, Hardware & Architecture

Deep H-GCN: Fast Analog IC Aging-Induced Degradation Estimation

Tinghuan Chen et al.

Summary: In this article, a heterogeneous graph convolutional network (H-GCN) is proposed to estimate aging-induced transistor degradation in analog ICs. The H-GCN efficiently represents the topology of analog ICs using a heterogeneous directed multigraph and a latent space mapping method. Experimental results on 5-nm industrial benchmarks show that the deep H-GCN achieves more accurate estimations of aging-induced transistor degradation with significant speedup compared to traditional methods and static aging reliability simulations.

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2022)

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Article Computer Science, Hardware & Architecture

Hotspot Detection via Attention-Based Deep Layout Metric Learning

Hao Geng et al.

Summary: This article presents a new end-to-end hotspot detection method that performs layout feature embedding and hotspot detection simultaneously using an attention mechanism-based deep convolutional neural network (CNN). The experimental results show improved accuracy and faster inference speed on more challenging benchmarks compared to prior arts.

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2022)

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Article Computer Science, Hardware & Architecture

DAMO: Deep Agile Mask Optimization for Full-Chip Scale

Guojin Chen et al.

Summary: This article introduces a high-performance and scalable deep-learning-enabled optical proximity correction (OPC) system for full-chip scale. The system includes lithography modeling and mask pattern generation, and proposes a novel layout splitting algorithm for full-chip OPC. Graph-based computation and parallelism techniques are used to accelerate computations. Extensive experiments show that the system outperforms state-of-the-art solutions in both academia and industry.

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2022)

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Article Computer Science, Hardware & Architecture

MLCAD: A Survey of Research in Machine Learning for CAD Keynote Paper

Martin Rapp et al.

Summary: Due to the growing complexity of integrated circuits (ICs), their design and optimization processes have become increasingly complicated. Machine learning (ML) has been applied successfully in designing and optimizing ICs, providing powerful models that can achieve optimal performance. This survey categorizes the application of ML in the design and runtime optimization of ICs, presenting a comprehensive summary of the state of the art and identifying areas for future research.

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2022)

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Article Computer Science, Hardware & Architecture

Machine Learning for Electronic Design Automation: A Survey

Guyue Huang et al.

Summary: With the down-scaling of CMOS technology, the increasing complexity of very large-scale integrated design and the recent breakthrough of ML have sparked more interest in incorporating ML to solve EDA tasks. This article provides a comprehensive review of existing ML for EDA studies, organized following the EDA hierarchy.

ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS (2021)

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Proceedings Paper Computer Science, Artificial Intelligence

Global Placement with Deep Learning-Enabled Explicit Routability Optimization

Siting Liu et al.

Summary: The study proposes a novel method to predict congestion hotspots using a fully convolutional network model and incorporate it into a placement engine for more optimized placement and routing results. Experimental results show that the proposed approach achieves significant reductions in congestion rate and routed wirelength on ISPD2015 benchmarks compared to state-of-the-art methods.

PROCEEDINGS OF THE 2021 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2021) (2021)

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Proceedings Paper Computer Science, Artificial Intelligence

Fast and Efficient DNN Deployment via Deep Gaussian Transfer Learning

Qi Sun et al.

Summary: This paper presents a novel transfer learning method based on deep Gaussian processes, which accelerates the optimization process and improves the inference performance of tasks by learning empirical knowledge from historical data and adjusting for new tasks.

2021 IEEE/CVF INTERNATIONAL CONFERENCE ON COMPUTER VISION (ICCV 2021) (2021)

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Proceedings Paper Automation & Control Systems

EMGraph: Fast Learning-Based Electromigration Analysis for Multi-Segment Interconnect Using Graph Convolution Networks

Wentian Jin et al.

Summary: In the era of nanotechnology, electromigration poses a major issue for VLSI circuits. A new graph convolution network model EMGraph has been proposed to accurately estimate the transient EM stress of interconnect trees, achieving higher accuracy and speed compared to other methods.

2021 58TH ACM/IEEE DESIGN AUTOMATION CONFERENCE (DAC) (2021)

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Proceedings Paper Computer Science, Hardware & Architecture

Hotspot Detection via Multi-task Learning and Transformer Encoder

Binwu Zhu et al.

Summary: With the rapid development of semiconductors, hotspot detection becomes more challenging and crucial. Existing hotspot detectors are often time-consuming on large layouts, leading to the proposal of an end-to-end single-stage detector for simplification.

2021 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN (ICCAD) (2021)

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Proceedings Paper Engineering, Electrical & Electronic

Bayesian Optimization Approach for Analog Circuit Design Using Multi-task Gaussian Process

Jiangli Huang et al.

Summary: In this paper, an efficient Bayesian optimization approach for analog circuit synthesis is proposed using a multi-task Gaussian process model. By extending the Gaussian process to a vector-valued function with a shared covariance function, the method learns dependencies between different circuit specifications. The experimental results demonstrate that the proposed method can reduce the number of simulations needed while achieving better optimization results.

2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) (2021)

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Proceedings Paper Computer Science, Hardware & Architecture

Exploiting Active Learning for Microcontroller Performance Prediction

Nicolo Bellarmino et al.

Summary: Speed monitors provide on-chip measurements to predict microcontroller performance, but accuracy depends on proper device training. Previous research used corner-lot wafers to predict performance, and we demonstrate how to select the best wafers for labeling in the training set.

2021 IEEE EUROPEAN TEST SYMPOSIUM (ETS 2021) (2021)

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Proceedings Paper Computer Science, Hardware & Architecture

Fast and Efficient Constraint Evaluation of Analog Layout Using Machine Learning Models

Tonmoy Dhar et al.

Summary: Placement algorithms for analog circuits explore layout configurations with the help of a fast feasibility predictor developed in this study. The predictor determines rough bounds on layout parasitics, prunes the feature space, and utilizes machine learning methods for sample classification. This approach efficiently evaluates candidate placements and constructs layouts for multiple analog blocks.

2021 26TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC) (2021)

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Proceedings Paper Computer Science, Hardware & Architecture

Layout Symmetry Annotation for Analog Circuits with Graph Neural Networks

Xiaohan Gao et al.

Summary: This work introduces a graph learning based framework for automatic constraint annotation from circuit netlists, focusing on symmetry constraints. The framework achieves significantly higher accuracy compared to previous works, and can be extended to other pairwise constraints as well.

2021 26TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC) (2021)

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Proceedings Paper Computer Science, Hardware & Architecture

Net2: A Graph Attention Network Method Customized for Pre-Placement Net Length Estimation

Zhiyao Xie et al.

Summary: Net length is a key metric for optimizing timing and power in digital design flow, but is difficult to estimate accurately before placement. This study introduces a graph attention network method called Net(2) to predict net length before placement, achieving better accuracy in identifying long nets and critical paths compared to previous works.

2021 26TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC) (2021)

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Article Computer Science, Hardware & Architecture

An Energy-aware Online Learning Framework for Resource Management in Heterogeneous Platforms

Sumit K. Mandal et al.

ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS (2020)

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Article Computer Science, Hardware & Architecture

GAN-OPC: Mask Optimization With Lithography-Guided Generative Adversarial Nets

Haoyu Yang et al.

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2020)

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Proceedings Paper Computer Science, Hardware & Architecture

GridNet: Fast Data-Driven EM-Induced IR Drop Prediction and Localized Fixing for On-Chip Power Grid Networks

Han Zhou et al.

2020 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED-DESIGN (ICCAD) (2020)

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Proceedings Paper Computer Science, Hardware & Architecture

VLSI Placement Parameter Optimization using Deep Reinforcement Learning

Anthony Agnesina et al.

2020 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED-DESIGN (ICCAD) (2020)

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Proceedings Paper Computer Science, Hardware & Architecture

A Customized Graph Neural Network Model for Guiding Analog IC Placement

Yaguang Li et al.

2020 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED-DESIGN (ICCAD) (2020)

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Proceedings Paper Computer Science, Artificial Intelligence

An Efficient and Flexible Learning Framework for Dynamic Power and Thermal Co-Management

Yuan Cao et al.

PROCEEDINGS OF THE 2020 ACM/IEEE 2ND WORKSHOP ON MACHINE LEARNING FOR CAD (MLCAD '20) (2020)

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Proceedings Paper Computer Science, Hardware & Architecture

DozzNoC: Reducing Static and Dynamic Energy in NoCs with Low-latency Voltage Regulators using Machine Learning

Mark Clark et al.

2020 IEEE 34TH INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM IPDPS 2020 (2020)

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Article Computer Science, Hardware & Architecture

Accelerating Chip Design With Machine Learning

Brucek Khailany et al.

IEEE MICRO (2020)

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Article Computer Science, Hardware & Architecture

Layout Hotspot Detection With Feature Tensor Generation and Deep Biased Learning

Haoyu Yang et al.

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2019)

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Article Computer Science, Hardware & Architecture

From Layout to System: Early Stage Power Delivery and Architecture Co-Exploration

Cheng Zhuo et al.

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (2019)

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Article Computer Science, Hardware & Architecture

Learning-Based Application-Agnostic 3D NoC Design for Heterogeneous Manycore Systems

Biresh Kumar Joardar et al.

IEEE TRANSACTIONS ON COMPUTERS (2019)

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Article Computer Science, Information Systems

A Double Deep Q-Learning Model for Energy-Efficient Edge Scheduling

Qingchen Zhang et al.

IEEE TRANSACTIONS ON SERVICES COMPUTING (2019)

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Proceedings Paper Computer Science, Software Engineering

WellGAN: Generative-Adversarial-Network-Guided Well Generation for Analog/Mixed-Signal Circuit Layout

Biying Xu et al.

PROCEEDINGS OF THE 2019 56TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC) (2019)

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Proceedings Paper Computer Science, Software Engineering

High Performance Graph Convolutional Networks with Applications in Testability Analysis

Yuzhe Ma et al.

PROCEEDINGS OF THE 2019 56TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC) (2019)

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Proceedings Paper Computer Science, Theory & Methods

Tackling Signal Electromigration with Learning-Based Detection and Multistage Mitigation

Wei Ye et al.

24TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC 2019) (2019)

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Proceedings Paper Computer Science, Theory & Methods

RouteNet: Routability Prediction for Mixed -Size Designs Using Convolutional Neural Network

Zhiyao Xie et al.

2018 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD) DIGEST OF TECHNICAL PAPERS (2018)

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Proceedings Paper Computer Science, Hardware & Architecture

Routability Optimization for Industrial Designs at Sub-14nm Process Nodes Using Machine Learning

Wei-Ting J. Chan et al.

ISPD'17: PROCEEDINGS OF THE 2017 ACM INTERNATIONAL SYMPOSIUM ON PHYSICAL DESIGN (2017)

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Article Computer Science, Artificial Intelligence

Random forests

L Breiman

MACHINE LEARNING (2001)

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Machine Learning in Advanced IC Design: A Methodological Survey

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