Distributed Quantum Error Correction for Chip-Level Catastrophic Errors

Quantum error correction holds the key to scaling up quantum computers. Cosmic ray events severely impact the operation of a quantum computer by causing chip-level catastrophic errors, essentially erasing the information encoded in a chip. Here, we present a distributed error correction scheme to combat the devastating effect of such events by introducing an additional layer of quantum erasure error correcting code across separate chips. We show that our scheme is fault tolerant against chip-level catastrophic errors and discuss its experimental implementation using superconducting qubits with microwave links. Our analysis shows that in state-of-the-art experiments, it is possible to suppress the rate of these errors from 1 per 10 s to less than 1 per month.

Automated summary

Quantum error correction is crucial for scaling up quantum computers. In this study, a distributed error correction scheme is proposed to combat the devastating impact of cosmic ray events on quantum computers. The scheme introduces an additional layer of quantum erasure error correcting code across separate chips and has shown fault tolerant behavior against chip-level catastrophic errors. Experimental implementation using superconducting qubits with microwave links has been discussed, and the analysis suggests that the error rate can be suppressed from 1 per 10 s to less than 1 per month.