4.6 Article

Vertical N-Type and P-Type Nanosheet FETs With C-Shaped Channel

期刊

IEEE TRANSACTIONS ON ELECTRON DEVICES
卷 70, 期 3, 页码 1380-1385

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2023.3239048

关键词

CMOS; dynamic random access memory (DRAM); nanosheet (NS); vertical C-shaped-channel nanosheet field-effect transistor (VCNFET)

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We presented and demonstrated vertical C-shaped-channel nanosheet field-effect transistors (VCNFETs) with precise control of both channel thickness and gate length. The VCNFETs were fabricated using high-quality Si/SiGe epitaxy and atomic layer deposition for nanometer-scale process control and self-aligned high-k metal gate (HKMG). The integration flow is compatible with mainstream industry processes and can be easily extended to vertically stacked devices. Perfect subthreshold swing (SS), small drain-induced barrier lowering (DIBL), and large I-ON/I-OFF ratios were achieved for both n-and p-VCNFETs.
We presented and demonstrated both n-and p-type vertical C-shaped-channel nanosheet field-effect transistors (VCNFETs) featured with precise control of both channel thickness and gate length. The VCNFETs were fabricated by high-quality Si/SiGe epitaxy and atomic layer deposition to obtain nanometer-scale process control and self-aligned high-k metal gate (HKMG). The integration flow is compatible with the process used in the mainstream industry and it can be easily extended to vertically stacked devices. Both the gate length and the channel thickness of the VCNFETs are mainly determined by the thicknesses of Si/SiGe films grown by epitaxy, instead of lithography and etch techniques. Perfect subthreshold swing (SS), small drain-induced barrier lowering (DIBL), and large I-ON/I-OFF ratio were achieved for both n-and p-VCNFETs due to the crystalline silicon channel and the well-defined doping profiles. The device performance and optimization were also investigated and discussed. Used as access transistors in dynamic random access memory (DRAM) array, VCNFETs were also demonstrated for the potential applications to 10-nm DRAM and beyond.

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