Endurance Improvement of Si FeFET by a Fully CMOS-Compatible Process: Insertion of HfOx a Hf0.5Zr0.5O2/SiOx Interface to Suppress Oxygen Vacancy Generation

This work investigates the endurance characteristic of Si FeFET with Hf0.5Zr0.5O2 ferroelectric. A fully CMOS-compatible method is shown to improve endurance: insertion of the thin HfOx layer ( similar to 2-5 angstrom) at the Hf0.5Zr0.5O2/SiOx interface. The ab initio calculations prove that the HfOx insertion can increase the formation energies of oxygen vacancies and suppress their generation in the gate stacks and, consequently, improve the endurance. This method paves a possible path to improve the endurance of Si FeFET.

Automated summary

This work investigates the endurance characteristic of Si FeFET with Hf0.5Zr0.5O2 ferroelectric and proposes a fully CMOS-compatible method to improve endurance by inserting a thin HfOx layer at the Hf0.5Zr0.5O2/SiOx interface. Ab initio calculations confirm the effectiveness of HfOx insertion in increasing the formation energies of oxygen vacancies and suppressing their generation in the gate stacks, thereby improving endurance of Si FeFET.