4.5 Article

Cross Layer Design Using HW/SW Co-Design and HLS to Accelerate Chaining in Genomic Analysis

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IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCAD.2023.3236559

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Chaining; DNA sequence alignment; energy-efficient; FPGA acceleration; minimap2

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This article introduces a novel heterogeneous computing system combining an Intel FPGA-based hardware accelerator and a CPU to accelerate the chaining step in DNA sequence analysis. The system achieves up to similar to 1.35x performance improvement and consumes similar to 27% less energy when handling large-realistic workloads. Compared to the software solution running on the CPU without SIMD intrinsics, the system performs similar to 1.9x faster while consuming similar to 38% less energy. Importantly, the accuracy of the output generated is not compromised for the gained speed-up.
DNA sequence analysis is a computationally intensive task. Minimap2 is a state-of-the-art software tool for third-generation sequence analysis workflow. Nearly 50% of Minimap2's computation time is spent on what is known as the chaining step. In this article, the chaining step is accelerated using a novel heterogeneous computing system combining an Intel FPGA-based hardware accelerator and a CPU (using high-level synthesis for the FPGA and multithreaded software for the CPU). The system in this article is capable of handling large-realistic workloads and achieves up to similar to 1.35x performance improvement over the software solution running on an Intel CPU with SIMD intrinsics (Intel's latest AVX-512) while consuming similar to 27 % less energy. When compared to the software solution running on the CPU without SIMD intrinsics, the system performs similar to 1.9x faster while consuming similar to 38% less energy. Importantly, this work also ensures that the accuracy of the output generated is not compromised for the speed-up gained (this work only has an error rate of less than 10(-6)% compared to 26% in previous FPGA-based chaining step accelerator).

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