期刊
IEEE JOURNAL OF SOLID-STATE CIRCUITS
卷 -, 期 -, 页码 -出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2022.3210212
关键词
Calibrator; injection-locked clock multiplier (ILCM); phase noise; power-gating (PG); ring oscillator (RO); rms jitter
资金
- Samsung Electronics Company Ltd.
- National Research and Development Program through the National Research Foundation of Korea - Ministry of Science and Information and Communications Technology (ICT) [2020R1A2C2004260]
- Institute for Information & Communications Technology Promotion (IITP) - Korea Government [Ministry of Science and Information and Communication Technology (MSIT)] [2022-0-01171]
- National Research Foundation of Korea [2020R1A2C2004260] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
This work introduces an ultralow-jitter injection-locked clock multiplier, achieving significant reduction in jitter through the use of power-gating injection method and a multi-functional calibrator.
This work presents an ultralow-jitter ring-oscillator (RO)-based injection-locked clock multiplier (ILCM). Using the power-gating (PG) injection method that can completely remove the accumulated phase error of the RO, the proposed ILCM can achieve a very wide injection bandwidth, and, thus, an ultralow-jitter, even when the multiplication factor, N, is increased above 60. To overcome the natural limitation of the PG injection, two digitally controlled oscillators (DCOs) were used to operate in a complementary manner. Since the background multi-functional calibrator (MFC) continuously synchronizes the outputs of the two DCOs, the PG-ILCM can generate a seamless output signal by combining these two signals. The proposed injection pulsewidth controller (IPWC) decreased the required delay of the digital-to-time converter (DTC), further reducing the jitter of the output signal. A phase-rotational divide-by-4 divider (PR-DIV4) also was proposed to reduce the operating frequency and the power consumption of the MFC while maintaining the fine resolution of the output frequency. The PG-ILCM, fabricated in a 65-om CMOS process, used the power of 143 mW and an area of 0.102 mm(2). The rms jitter measured at 8.16 GHz (N = 68) was 97 fs.
作者
我是这篇论文的作者
点击您的名字以认领此论文并将其添加到您的个人资料中。
推荐
暂无数据