MEMRISTOR-BASED LSTM NETWORK FOR TEXT CLASSIFICATION

Long short-term memory (LSTM) with significantly increased complexity and a large number of parameters have a bottleneck in computing power resulting from limited memory capacity. Hardware acceleration of LSTM using memristor circuit is an effective solution. This paper presents a complete design of memristive LSTM network system. Both the LSTM cell and the fully connected layer circuit are implemented through memristor crossbars, and the 1T1R design avoids the influence of the sneak current which helps to improve the accuracy of network calculation. To reduce the power consumption, the word embedding dimensionality was reduced using the GloVe model, and the number of features in the hidden layer was reduced. The effectiveness of the proposed scheme is verified by performing the text classification task on the IMDB dataset and the hardware training accuracy reached as high as 88.58%.

Automated summary

This paper presents a complete design of memristive LSTM network system using memristor circuit for hardware acceleration. The proposed scheme effectively reduces power consumption and improves network calculation accuracy, achieving a hardware training accuracy as high as 88.58% in text classification task on the IMDB dataset.