期刊
MICROMACHINES
卷 13, 期 9, 页码 -出版社
MDPI
DOI: 10.3390/mi13091551
关键词
MOSFET; vertical gate-all-around; FinFET; nano-sheet FET; short channel effect
类别
资金
- National Research Foundation of Korea (NRF) - Korean government (MSIT) [2020R1A2C1009063, 2020M3F3A2A01082326, 2020M3F3A2A01081672, 2020M3F3A2A02082436]
A novel vertical gate-all-around device architecture GAA-FinFET was proposed to improve device performance and address the short channel effect. Compared to conventional FinFET and NSFET, GAA-FinFET exhibited superior characteristics in terms of SCE and electrical performance.
In this work, we propose a vertical gate-all-around device architecture (GAA-FinFET) with the aim of simultaneously improving device performance as well as addressing the short channel effect (SCE). The GAA-FinFET was built using the technology computer-aided design (TCAD) simulation tool, and then, its electrical characteristics were quantitatively evaluated. The electrical characteristics of the GAA-FinFET were compared to those of conventional FinFET and nano-sheet FET (NSFET) at 7 nm or 5 nm nodes. When comparing the GAA-FinFET against the FinFET, it achieved not only better SCE characteristics, but also higher on-state drive current due to its gate-all-around device structure. This helps to improve the ratio of effective drive current to off-state leakage current (i.e., I-eff/I-off) by similar to 30%, resulting in an improvement in DC device performance by similar to 10%. When comparing the GAA-FinFET against the NSFET, it exhibited SCE characteristics that were comparable or superior thanks to its improved sub-channel leakage suppression. It turned out that the proposed GAA-FinFET (compared to conventional FinFET at the 7 nm or 5 nm nodes, or even beyond) is an attractive option for improving device performance in terms of SCE and series resistance. Furthermore, it is expected that the device structure of GAA-FinFET is very similar to that of conventional FinFET, resulting in further improvement to its electrical characteristics as a result of its gate-all-around device structure without significant modification with respect to the processing steps for conventional FinFET.
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