TCAD-based design and verification of the components of a 200 V GaN-IC platform

This paper describes the TCAD-based design and verification of the different components of a 200 V GaN-on-SOI integrated circuits (ICs) platform developed on 200 mm substrates. This platform comprises of depletion -mode (d-mode) MIS-HEMTs, and Gated-Edge-Termination Schottky barrier diodes (GET-SBDs) monolithically integrated in an enhancement-mode (e-mode) HEMT technology baseline. A variety of low-voltage analog/logic devices and passive components further supports the GaN ICs platform. Device simulations have been verified using measured low voltage test structures. Verification of simulations with the measurements results in calibration of sheet resistance (Rsh) in the gate and access region, threshold voltage (Vth), drain current (Ids), ON-resistance (RON), gate current (Ig) for HEMT structures, and turn-on voltage (VT) and forward voltage drop (VF) for GET-SBD structure.

Automated summary

This paper presents the TCAD-based design and verification of a 200 V GaN-on-SOI integrated circuits platform, which includes depletion-mode MIS-HEMTs and Gated-Edge-Termination Schottky barrier diodes (GET-SBDs). The platform also consists of low-voltage analog/logic devices and passive components to support the GaN ICs. Device simulations were validated through measurements of low voltage test structures, resulting in calibration of various parameters for HEMT and GET-SBD structures.