ESD nMOSFETs in Advanced Bulk FinFET Technology With Dual S/D Epitaxy

In this work, the electrostatic discharge (ESD) reliability of the OFF- and ON-state NMOS field-effect transistors in a bulk FinFET technology are investigated. The impacts of source and drain epitaxy influenced by the gate pitch (GP) and the gate length (L-g) are studied. In the OFF-state NMOSFET, which is known as grounded-gate NMOS (ggNMOS), the large GP introduces nonuniform epitaxy on source and drain, which cause high power density localization in device. The large L-g effectively helps the ESD performance of ggNMOS in ways of better turn-on and contact current uniformity. The ON-state NMOSFET as an active power-rail clamp is also studied in 3-D TCAD simulations. The device shows little difference to transient responses, while the clamping voltage can be different with L-g and GPs. With the same gate space, the short L-g device has a lower clamping voltage and ON-resistance, which reduces oxide breakdown risk and achieves better ESD performance.

Automated summary

The electrostatic discharge (ESD) reliability of OFF- and ON-state NMOS field-effect transistors in a bulk FinFET technology is investigated in this study. The study focuses on the impacts of gate pitch (GP) and gate length (L-g) on the epitaxy of source and drain regions. It is found that a large GP leads to nonuniform epitaxy and high power density localization in the device, while a large L-g improves the ESD performance. Additionally, the study reveals that the clamping voltage and ON-resistance of the ON-state NMOSFET are influenced by L-g and GPs, with shorter L-g and the same gate space achieving better ESD performance.