期刊
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
卷 41, 期 10, 页码 3400-3413出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCAD.2021.3124763
关键词
Circuit faults; Computational modeling; Deep learning; Hardware; Redundancy; Neural networks; Computer architecture; Deep learning accelerator (DLA); fault detection; fault tolerance; hybrid computing architecture (HyCA)
类别
资金
- National Key Research and Development Program of China [2020YFB1600201]
- National Natural Science Foundation of China [62174162, 61902375, 61834006]
This paper proposes a hybrid computing architecture for fault-tolerant DLAs, which shows significantly higher reliability, scalability, and performance with less chip area penalty compared to conventional redundancy approaches. By taking advantage of flexible recomputing, it can also be used to scan the entire 2-D computing array and effectively detect faulty PEs at runtime.
Hardware faults on the regular 2-D computing array of a typical deep learning accelerator (DLA) can lead to dramatic prediction accuracy loss. Prior redundancy design approaches typically have each homogeneous redundant processing element (PE) to mitigate faulty PEs for a limited region of the 2-D computing array rather than the entire computing array to avoid the excessive hardware overhead. However, they fail to recover the computing array when the number of faulty PEs in any region exceeds the number of redundant PEs in the same region. The mismatch problem deteriorates when the fault injection rate rises and the faults are unevenly distributed. To address the problem, we propose a hybrid computing architecture (HyCA) for fault-tolerant DLAs. It has a set of dot-production processing units (DPPUs) to recompute all the operations that are mapped to the faulty PEs despite the faulty PE locations. According to our experiments, HyCA shows significantly higher reliability, scalability, and performance with less chip area penalty when compared to the conventional redundancy approaches. Moreover, by taking advantage of the flexible recomputing, HyCA can also be utilized to scan the entire 2-D computing array and detect the faulty PEs effectively at runtime.
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