Dynamic modeling of total ionizing dose-induced threshold voltage shifts in MOS devices

The total ionizing dose (TID) effect is a key cause for the degradation/failure of semiconductor device performance under energetic-particle irradiation. We developed a dynamic model of mobile particles and defects by solving the rate equations and Poisson's equation simultaneously, to understand threshold voltage shifts induced by TID in silicon-based metal-oxide-semiconductor (MOS) devices. The calculated charged defect distribution and corresponding electric field under different TIDs are consistent with experiments. TID changes the electric field at the Si/SiO2 interface by inducing the accumulation of oxide charged defects nearby, thus shifting the threshold voltage accordingly. With increasing TID, the oxide charged defects increase to saturation, and the electric field increases following the universal 2/3 power law. Through analyzing the influence of TID on the interfacial electric field by different factors, we recommend that the radiation-hardened performance of devices can be improved by choosing a thin oxide layer with high permittivity and under high gate voltages.

Automated summary

The total ionizing dose (TID) effect is a major factor contributing to the degradation/failure of semiconductor devices under high-energy particle irradiation. A dynamic model was developed to understand the threshold voltage shifts induced by TID in silicon-based metal-oxide-semiconductor (MOS) devices by solving rate equations and Poisson's equation simultaneously. The calculated charged defect distribution and electric field under different TIDs matched experimental results. TID alters the electric field at the Si/SiO2 interface by accumulating oxide charged defects nearby, leading to threshold voltage shifts accordingly. As TID increases, the oxide charged defects reach saturation and the electric field follows a universal 2/3 power law. Analyzing the impact of TID on the interfacial electric field, we recommend improving the radiation-hardened performance of devices by selecting a thin oxide layer with high permittivity and operating at high gate voltages.