The Effect of Deposition Conditions on Heterointerface-Driven Band Alignment and Resistive Switching Properties

Titanium nitride and hafnium oxide stack have been widely used in various resistive memory elements since the materials are complementary-metal-oxide-semiconductor compatible. The understanding of the interface properties between the electrode and the oxide is important in designing the memory behavior. To bridge this understanding, HfOx grown using plasma enhanced atomic layer deposition (PEALD) and thermal atomic layer deposition (TALD) are compared, in terms of band alignment and electrical performances in the HfOx/PEALD TiN stacks. X-ray photoelectron spectroscopy reveals a thicker interfacial TiO2 layer in the PEALD HfOx/TiN stack whose interface resembles more to the PEALD HfOx/TiO2 interface (conduction band offset Delta E-C = 1.63 eV), whereas the TALD HfOx stack interface resembles more to the TALD HfOx/TiN interface (Delta E-C = 2.22 eV). The increase in the forming voltage and the early onset of reverse filament formation (RFF) in the I-V measurements for the PEALD HfOx stack confirms the presence of the thicker interfacial layer; the early onset of RFF is likely related to a smaller Delta E-C. The findings show the importance of understanding the intricate details of the material stack, where Delta E-C difference and the presence of a thicker TiO2 interfacial layer due to different deposition procedures affect the device performance.

Automated summary

Titanium nitride and hafnium oxide stack, which are compatible with complementary-metal-oxide-semiconductor, have been widely used in resistive memory elements. This study compares HfOx grown using plasma enhanced atomic layer deposition (PEALD) and thermal atomic layer deposition (TALD) in terms of band alignment and electrical performances in the HfOx/PEALD TiN stacks. The findings show the significance of understanding the intricate details of the material stack, such as delta E-C difference and the presence of a thicker TiO2 interfacial layer, in affecting the device performance.