Logic and memory functions of an inverter comprising reconfigurable double gated feedback field effect transistors

In this study, we propose an inverter consisting of reconfigurable double-gated (DG) feedback field-effect transistors (FBFETs) and examine its logic and memory operations through a mixed-mode technology computer-aided design simulation. The DG FBFETs can be reconfigured to n- or p-channel modes, and these modes exhibit an on/off current ratio of similar to 10(12) and a subthreshold swing (SS) of similar to 0.4 mV/dec. Our study suggests the solution to the output voltage loss, a common problem in FBFET-based inverters; the proposed inverter exhibits the same output logic voltage as the supply voltage in gigahertz frequencies by applying a reset operation between the logic operations. The inverter retains the output logic '1' and '0' states for similar to 21 s without the supply voltage. The proposed inverter demonstrates the promising potential for logic-in-memory application.

Automated summary

This study proposes an inverter composed of reconfigurable double-gated feedback field-effect transistors (FBFETs) and investigates its logic and memory operations through computer-aided design simulations. The proposed inverter addresses the output voltage loss issue commonly found in FBFET-based inverters and achieves the same output logic voltage as the supply voltage, demonstrating promising potential for logic-in-memory applications.