A 2 MS/s Full Bandwidth Hall System with Low Offset Enabled by Randomized Spinning

In this paper, a Hall plate readout with a randomized four-phase spinning-current scheme is proposed. The goal is to remove the maximum number of offset components, including the offset associated with spike demodulation. The outcome is that only the smallest possible offset remains, corresponding to the residual offset of the Hall plate which cannot be distinguished from the Hall signal. An additional innovation is to operate various offset-reduction loops in spread-spectrum mode, allowing the removal of error components without notching out any in-band signals. The resulting approach delivers a very large notch-free bandwidth while simultaneously reducing the Hall plate residual offset, making it an enabler for high-bandwidth Hall-based current sensors. To demonstrate the proposed techniques, we have realized a mixed-mode experimental circuit, where the analog part is implemented in a custom integrated circuit, and the digital control system in an FPGA is connected to the analog chip. Measurement results feature a Hall readout system with a notch-free bandwidth up to 820 kHz and a 47 mu Trms noise floor. The input-referred Hall plate offset, based on statistical measurements on 10 samples from a single wafer, is reduced from 130 +/- 22 mu T to only 23 +/- 22 mu T.

Automated summary

This paper proposes a Hall plate readout with a randomized four-phase spinning-current scheme to remove offset components and enable high-bandwidth Hall-based current sensors. By operating offset-reduction loops in spread-spectrum mode, a notch-free bandwidth is achieved. Experimental results demonstrate a significant reduction in the Hall plate residual offset.