4.6 Article

Design and optimization of a passive PT-symmetric grating with asymmetric reflection and diffraction

期刊

OPTICS EXPRESS
卷 30, 期 16, 页码 29340-29351

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Optica Publishing Group
DOI: 10.1364/OE.465110

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资金

  1. National Key Research and Development Program of China [2018YFE0201800]
  2. China Postdoctoral Science Foundation [2021M690390]
  3. National Natural Science Foundation of China [62071042, 62105028]

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Notions drawn from non-Hermitian physics and parity-time (PT) symmetry have gained significant attention in photonics. In this study, a compact passive PT-symmetric grating is proposed on a silicon-on-insulator (SOI) platform, enabling asymmetric reflection and diffraction. The research provides a new perspective for exploring and creating complex on-chip PT-symmetric devices.
In recent years, notions drawn from non-Hermitian physics and parity-time (PT) symmetry have raised considerable attention in photonics, enabling various novel structures with entirely new and unexpected features. Here we propose, design, and optimize a compact passive PT-symmetric grating to achieve asymmetric reflection and diffraction based on a silicon-on-insulator (SOI) platform. The structure is composed of two sets of interleaved tailored gratings, which are all well-defined on the top of a silicon waveguide. Without additional loss or gain materials, the effective index and the scattering loss of the waveguide mode are modulated by the structure design. To our knowledge, it is the first time that the scattering loss arising from grating elements is regarded as an efficient way to realize PT-symmetric structure. The complicated multi-parameter optimization process of the proposed PT-symmetric grating is completed by using the particle swarm optimization (PSO) algorithm. In the simulation, asymmetric reflection with high contrast ratio is realized. We also find that the waveguide-to-free-space diffraction from one side of the structure is significantly suppressed, leading to asymmetric diffraction. Moreover, we investigate the fabrication tolerance of the proposed PT-symmetric grating. Our work provides a new perspective for exploring and creating complicated on-chip PT-symmetric devices. (C) 2022 Optica Publishing Group under the terms of the Optica Open Access Publishing Agreement

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